Mr.Seetha Rama Raju Sanapala

Faculty Id: VCE 1175
Date of Birth: 15 June , 1963
Designation: Associate Professor
Years of Experiance : 32
Email Id: manjuvenamma@yahoo.co.in
Phone Number: 7259520872
Faculty Web Page:
Employment Status: Full Time - Ratified by JNTUH
Areas of Specialization: Signal Processing
UG Degree: Electonics and Communication Engineering,1984,Andhra University
PG Degree: Microwave and Radar Engineering,1986, Osmania University
Ph.D: ,
Subjects Taught:
  1. Digital Signal Processing
  2. Signals and Systems
  3. Advanced Digital Signal Processing
  4. Digital Signal Compression
  5. Error Control Coding
Papers Published:
  1. Seetha Rama Raju Sanapala,Hemalatha TC, “Design of quad-core crypto processor for high performance on FPGA platform”, International journal of embedded and software computing (IJESC),(ISSN 2250-1371) volume-I, Issue-5 May-2013.
  2. Seetha Rama Raju Sanapala,“A correct and simple method of writing PFC codes” presented at CISCON 2014 (during Nov 7 & 8, 2014), Manipal Institute of Technology, Manipal, published in STM journal with ISBN.
  3. Seetha Rama Raju Sanapala,“Uniformity Parameters in Mersenne Twister Random Number Generator for Monte Carlo Simulation” Proceedings of the National Conference on Information Technology, Communications and Signal Processing (CISP-2013), at Government Engineering College, Wayanad, 1-2, March 2013.
  4. Seetha Rama Raju Sanapala,“Tragic and dangerous fall of educational standards in India and immediate steps to resuscitate”, Proceedings of the National conference on Indian Higher Education in the 21st century- Five decades ahead-challenges and prospects,at Kristu Jayanthi college, Bangalore, November 29 & 30, 2012.
  5. Seetha Rama Raju Sanapala,“Matrix Structure Based Algorithm Selection For Matrix Computation applications in signal processing”, Proceedings of the National conference on Emerging trends in engineering and technology, at Sapthagiri college of engineering, 11th May 2013.
  6. Seetha Rama Raju Sanapala,”Better and clear explanation of the technique of linear convolution of long sequences by sectioning” Proceedings of the National Conference on Wireless Communication, Signal Processing, Embedded Systems at BMSCE June 20 to 22, 2013, Bangalore, INDIA supported by IET, IEEE.
Books Published:
None
Research Projects Undertaken:
None