Mrs. A. Vijaya Lakshmi

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Department:
Electronics & Communication Engineering
Faculty Id:
VCE 057
Designation:
Associate Professor
Years of Experience:
16 years
Employment Status:
Full Time – Ratified by JNTUH
DOJ:

19/06/2006

JNTU ID:

16150401-152847

Years of Industry Experience:

2

Years of Research Experience:

3

Ph.D. Guide:

No

Number of PhDs Awarded under your supervision:

NA

Number of PhD scholars, Currently Supervising:

NA

Number of Patents Published:

Nil

Number of Patents Granted:

Nil

AICTE ID:

1-487277301

Phone:
9441189635

Date of Birth:

20 August 1975

Areas of Specialization :

Signal processing, Coding Theory, Communication Engineering

Qualification:

Ph.D. in Signal Processing(Pursuing), JNTUA,
PG Degree in M. E (Digital Systems Engineering) ,2009, Osmania University, Hyderabad,
UG Degree in B. E (Electronics and Communication Engineering),1999,Osmania University, Hyderabad.

Subjects Taught:

Signals and Systems,Analog Communications,Digital Logic Design,Digital Communications,Digital Signal Processing,Probability theory and Stochastic Process,Linear ICApplications,Advanced Digital Signal Processing,Coding Theory and Techniques,Cellular and Mobile communications.

Papers Published:

  1. A Vijaya Lakshmi, V Sri Lakshmi Sowmya, “Adaptive code allocation for interference management in CDMA systems”, International conference ASECI-2010, Jan 6 &7th2010,V.R.Siddhartha Engineering College,Vijayawada.
  2. A Vijaya lakshmi, M Gopi Krishna, “Code allocation for interference reduction in wireless Systems”, National Conference on Signal processing and Communication Systems, 25th Feb 2010, RVR& JC College of Engg., Guntur.
  3. G. kalyan Chakravarthy, K. Satya Sree, A. Vijaya Lakshmi “ Shift Odd-Even Bus Invert Coding for Low-Power I/O ” Published in the International Journal of Information Technology & Computer Sciences Perspectives © Pezzottaite Journals, ISSN (P): 2319-9016, (O): 2319-90249, Vol 02- Number 02, page number 52-526, April-June 2013.
  4. A.Vijaya lakshmi,”Implementation of Product Reed Solomon Codes for Multi level cell Flash controller” published in the IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN:2278-2834, p-ISSN:2278-8735, Volume 6, Issue 5 (Jul. – Aug. 2013), PP 01-11.
  5. M. Nagarjuna, V. Harini, A. Vijayalakshmi, M. Ramanjaneyulu, “Efficient Multiternary Digit Adder Design in CMOS Technology”, National Conference on Nanomaterials & Technologies 2013, pp. 87 – 94.

Books Published:

None

Research Projects Undertaken:

None