Mr. R. Phani Vidyadhar

Department:
Electronics & communication Engineering
Faculty Id:
VCE741
Designation:
Assistant Professor
Years of Experience:
6 years
Employment Status:
Full Time – Ratified by JNTUH
Phone:

Date of Birth:

19 May ,1989

Areas of Specialization :

VLSI Design Automation, DSP, ASIC Design

 

Qualification:

PG Degree in  B.TECH,2011,JNTU
UG Degree in M.TECH(VLSI Design),2013, SRM

Subjects Taught:

Signals and systems, Digital Signal Processing, Digital logic Design.

Papers Published:

  1. R.Phani Vidyadhar and J.Selvakumar,”Reconfigurable Architecture using fast heuristic algorithm for integer arithmetic”,IRD2013 Conf.Proceedings,ISBN:978-93-81693-88-14,MARCH,2013.
    R.Phani Vidyadhar and J.Selvakumar,”Reconfigurable Architecture using fast heuristic algorithm for integer arithmetic”IJAEEE Journal Publication ,ISSN-2278-8948.
    R.Phani Vidyadhar and J.Selvakumar “FPGA IMPLEMENTATION OF RECONFIGURABLE ARCHITECTURE FOR LOGICAL OPERATRIONS “,IJECE JOURNAL PUBLICATION ,ISSN-2278-9901 HAVING IMPACT FACTOR(JCC)-2.593.

Books.Published:

None

Research Projects Undertaken:

None